Just wanting some details on the upcoming TSP chip, architecture, voltages, compute power. Just trying to figure out how it differs from competitors like Akida and the NDP series from Syntiant.
The best person to contact for this kind of information is our co-CEO, Peter Suma. I’ll DM you his email address. He can provide more details than might be available on our website. For anyone else who is interested, using our contact form and selecting “Time Series Processor” is also a good way to get in touch.
Here’s the summary of the chip on our website. Essentially, it’s a proprietary architecture designed to run LMU-based networks very efficiently, enabling applications like automatic speech recognition, natural language processing, and biosignal processing for under 25 mW of power. We’re expecting the cost per chip to be under $4 USD.